A 0.6um CMOS, 622/155 Mbit/s, ATM-SDH/SONET Framer IC

Authors

  • M. Koziotis
  • A. Birbas
  • R. Stojanović
  • S. Theoharis
  • S. Iseed

Abstract

A Node Network Interface/User Network Interface (NNI/UNI) ATM Framer ASIC which implements the SDH/SONET based Transmission Convergence (TC) sublayer of the B-ISDN reference model, has been fabricated. The FRAMER chip is suitable for 622.08 or 155.52 Mbit/s line rates. It incorporates 491K transistors, consumes 2W of power and has been implemented in 0.6µm CMOS technology.

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Published

24.03.2023

Issue

Vol. 9 No. 1 (2001)

Section

Articles

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