Dataflow Supercomputing: Concepts of Importance

Abstract

This paper focuses on designing and programming a DataFlow computer by modifying existing algorithms for better hardware utilization. Maxeler Technologies provides libraries for transforming Java-like time-critical code into the FPGA configuration files in compile-time, while C, C++, or FORTRAN code executes on the CPU and makes function-calls to start the calculation on the hardware. Using the tools from the manufacturer of the underlying FPGA technology, a .max file is formed and linked with the compiled .c code and the appropriate runtime routines, forming the executable for the control flow host. Since compilation is performed down to levels
much below the machine code level (to register transfer level, gate transfer level, and transistor transfer level), the DataFlow paradigm offers better utilization of the chip for the program it is built for, making execution faster and power dissipation lower. The proposed technology is best used if the BigData can be partitioned into chunks of appropriate sizes. The time of DataFlow architecture is yet to come, mostly due to the facts that the FPGA technology and the compiler technology continue to improve; therefore, the amount of applications of DataFlow technology will increase drastically.